Custom 2-channel digital oscilloscope DAQ with 20MHz bandwidth. Built with a custom KiCad analog front-end (AFE) PCB, Gowin FPGA (Tang Nano 9K) for high-speed signal buffering (VHDL), and an RPi Pico MCU for SCPI-like control. Includes a simple Python GUI for data visualization.
Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials
Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials
Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials
Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials
Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials
Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials
Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials
Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials