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Embedded Systems Lab (ESL) - EPFL

Embedded Systems Laboratory (ESL) at École Polytechnique Fédérale de Lausanne (EPFL)

17 designs

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main board

VersaSens HeEx

VersaSens: An Extendable Multimodal Platform for Next-Generation Edge-AI Wearables

ADC Board

Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials

CHEEP Board

Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials

Memory Board

Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials

Power Board

Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials

CHEEP Board Panel

Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials

Combined Module Panel

Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials

Power Board Panel

Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials

ADC Board Socket

Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials

CHEEP Board Socket

Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials

Memory Board Socket

Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials

Power Board Socket

Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials