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FTDI — Open-source FPGA development board for education and digital design learning. Designed for accessibility, reproducibility and seamless integration with open FPGA toolchains for students, makers and academic environments. | Open App Note

Azukar-FPGA

maxisimonazzi

Open-source FPGA development board for education and digital design learning. Designed for accessibility, reproducibility and seamless integration with open FPGA toolchains for students, makers and academic environments.

Components (33)

Reference	Value	Description
U1	TLV76133DCYR	3.3V, 1A, Low Noise, High-PSRR LDO Regulator, 2.5V...16V input, SOT-223
U2	TLV76112DCYR	1.2V, 1A, Low Noise, High-PSRR LDO Regulator, 2.5V...16V input, SOT-223
U3	USBLC6-2SC6	Very low capacitance ESD protection diode, 2 data-line, SOT-23-6
U4	FT2232HL	Hi Speed Double Channel USB UART/FIFO, LQFP-64
U5	M93C66	Serial EEPROM, 93 Series, with ORG Pin, 5.0V, DIP-8/SOIC-8
U6	ICE40HX4K-TQ144

Azukar-FPGA schematic

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Azukar-FPGA board

Y1	ECS-3225MV-120-CN-TR	Standard Clock Oscillators XO 12.000MHZ CMOS SMD ECS-3225MV XO Enable/Disable CMOS 1.7 V ~ 3.6 V +/- 25ppm -40 C ~ 85 C 20 mA Surface Mount 4-SMD, No Lead 0.098" L x 0.079" W (2.50mm x 2.00mm) 0.035" (1.2mm),AECQ

Y2	ECS-3225MVQ-1000-CN-TR	Standard Clock Oscillators XO 100.000MHZ CMOS SMD ECS-3225MVQ XO Enable/Disable CMOS 1.7 V ~ 3.6 V +/- 25ppm -40 C ~ 85 C 20 mA Surface Mount 4-SMD, No Lead 0.098" L x 0.079" W (2.50mm x 2.00mm) 0.035" (1.2mm),AECQ

Z1	MMBZ5231BLT3G	225 mW Rating on FR-4 or FR-5 Board; Zener Voltage Range - 2.4 V to 91 V; Package Designed for Optimal Automated Board Assembly; Small Package Size for High Density Applications; ESD Rating of Class 3 (>16 KV) per Human Body Model Mechanical Characteristics; CASE: Void-free, transfer-molded, thermosetting plastic case; FINISH: Corrosion resistant finish, easily solderable; MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES: 260C for 10 Seconds; POLARITY: Cathode indicated by polarity band; FLAMMABILITY RATING: