arcfpga-cores
bmo00
Arcade FPGA cores built with JTFRAME for multiple FPGA platforms
Components (32)
| Reference | Value | Description |
|---|---|---|
| A1,A16,A331,A418,A438,E442 | CLKDRV | Clock Driver |
| A31,A45,A57,B18,B30,C1,C13,C41,E16,F1,F13,F42,F81,F98,F134,F171 | MUX41 | 4 to 1 MUX |
| A69,A110,A125,A140,A155,A170,A198,A228,A277,A310,B3,B146,B371,B386,B441,C187,C268,C310,C349,C364,C389,C404,C429,D393,D442,E1,E246,E266,E308,E338,E361,E376,E391,E412,E427,F25,F66,F183,F211,F248,F284,F321,F400 | DFF | DFF |
| A84,A87,A213,A248,A259,A274,A292,A307,A383,A392,A407,B84,B87,B161,B177,B326,B362,B409,B430,B433,C87,C147,C160,C210,C217,C252,C255,C449,D2,D236,D259,D272,D314,D347,D390,D433,D439,E74,E111,E114 | INV | Inverter |
| A90,B42,B57,B69,C29,C53,D123,D151,D168,D214,D244,D289,D302,D317,D358,D421,E36,E83,E95,E127,E142,E172,E197,E281,F54,F110,F146,F159 | DFF2 | DFF low drive |
| A106,A410,B180,B184,B199,B246,B264,B291,B313,B405,C122,C163,C206,C213,C325,D99,D104,D114,D370,E107,E334,E353,E357,F94 | BUF | Buffer |
| A185,A191,A216,A222,A251,A262,A268,A300,A325,A368,B165,B171,B193,B285,B334,B340 | AOI221 | AND–OR–Invert gate with two 2-input AND sections and one direct OR input |
| A243,A295,A346,A433 | BUF2 | Buffer |
| A351,B102,B129,B203,B224,B268,C90,C167,D48,D65,D82 | DFF3 | DFF with /SET |
| A374,A386,A389 | BUF3 | Buffer |
| A378,B351 | NAND4 | 4-lnput NAND |
| A395,A399 | OR2 | 2-lnput OR |
| A403,B256,B259,B321,B365,B368,B436,C84,C184,C232,C235,C238,D23,D37,D40,D111,D143,D188,D256,D355,D382,D436,E33,E58,E118,E121,E139,E194,E219,E227,E293,E304,E326,F122,F205 | NAND2 | 2-lnput NAND |
| A414,A453,B220,B317 | AND2 | 2-lnput AND |
| AA1,AA117,AA251,AA367 | SRAM128B4 | 128 x 4-bit SRAM with internal timing for R/W |
| B90,B96,C241 | XOR | Exclusive Or |
| B119,B124,B188,B329,B356,C79,C112,C117,C130,C138,C150,C155,C452,D1,D15,D32,D118,D138,D183,D191,D226,D231,D239,D276,D329,D334,D339,D374,D408,D416,E48,E61,E164,E209,E222,E241,E296,E329,F126,F198 | XNOR | Exclusive Not Or |
| B241,B346,C107,C334,C379 | BUFINV2 | Buffer and Inverter |
| B250 | MUX21 | 2 to 1 MUX |
| B295,B413 | DFF4 | DFF with /RESET |
| B324,B401,B403,B439,C220,C230,C247,C347 | INV2 | Inverter |
| C26,D9,D20,D26 | NOR2 | 2-lnput NOR |
| C65,C74,C258,C263,C305,C329,C384,C419,C424,C444,D43,D146,D163,D196,D201,D206,D262,D267,D284,D350,D385,E53,E69,E78,E154,E159,E184,E189,E233,E261 | AOI22 | AND–OR–Invert gate with two 2-input AND sections |
| C71,C135,C249,D6,D12,D29,D108,D135,D180,D211,D281,D344,D379,D413,E28,E66,E124,E169,E216,E230,E238,E301,E323,F131,F208 | BUFINV | Buffer and Inverter |
| C126,C143 | NAND3 | 3-lnput NAND |
| C202,C222 | NOR3 | 3-lnput NOR |
| C226 | INVP | Power Inverter |
| C283 | DFF5 | Scanning DFF with /RESET |
| C339,C343 | AOI21 | AND–OR–Invert gate with two inputs on the AND side and one on the OR side |
| E406 | AND4 | 4-lnput AND |
| F226,F263,F299,F336,F357,F378,F415,F436 | INVIO | Inverter for I/O output with enable |
| R1 | R | Resistor |